Re: x86: move the LAPIC va

[Maxime Villard <max%m00nbsd.net@localhost>]

Le 20/10/2016 à 18:58, Joerg Sonnenberger a écrit :
> > > > I've removed lapic_tpr, which means there is only one pointer to the LAPIC
> > > > page and each register access is done with offsets. I have reupdated and
> > > > resimplified my patch. The only thing we do now is allocating one page of
> > > > va at boot time, and add a level of indirection in the asm code.
> > >
> > > The access via read/write reg is effectively the same as above. I'm not
> > > a fan of the inline functions as they are due to the multiple layers of
> > > casts...
> >
> > What I'm personally not fan of is the name of these functions. But whatever.
> > I guess I'll commit this patch in a week or two, unless someone disagrees.
>
> Well, the third chunk in i386/vector.S is broken. You are changing %ebx
> right before iret. To avoid other issues, the fourth chunk should just be
> using %ebx too as that's obviously rewritten just afterwards.

I've committed the patch, but without the push/pop before iret. As I said in
the comment, the ddb ipi triggers a hardware context switch, so in fact we
don't care about overwriting %ebx before iret.

As a general rule, and for the record: normally we should never have to worry
about the state of the registers upon exit when modifying an isr. If we had to,
it would mean that there is already a problem.

Now that it is committed, if someone here sees a regression, a panic or
whatever, please report it to me.

(and thanks for the review)