Re: pci_mapreg_map(9) and prefetchable BARs

[Michael <macallan1888%gmail.com@localhost>]

Hello,

On Wed, 10 Aug 2011 14:08:57 -0500
David Young <dyoung%pobox.com@localhost> wrote:

> On Wed, Aug 10, 2011 at 08:04:16AM +0100, David Laight wrote:
> > On Tue, Aug 09, 2011 at 06:11:29PM -0500, David Young wrote:
> > > On Tue, Aug 09, 2011 at 05:38:43PM -0400, Michael wrote:
> > > > Hello,
> > > > 
> > > > Why would it fail if the BAR is marked as prefetchable but someone
> > > > requests a non-prefetchable mapping? The bit is just a hint.
> > > 
> > > My phrasing was probably awkward.  It wouldn't fail in that case.
> > > 
> > > Here's the proposal:
> > > 
> > > 1 Safety first: pci_mapreg_map() should map every BAR as
> > >   if it is non-prefetchable (i.e., non-cached, non-write
> > >   combining, order enforced) unless the caller passes the hint
> > >   BUS_SPACE_MAP_PREFETCHABLE.
> > > 
> > > 2 pci_mapreg_map() should turn on caching, write-combining, et cetera,
> > >   on a prefetchable BAR if the caller passes BUS_SPACE_MAP_PREFETCHABLE.
> > > 
> > > 3 pci_mapreg_map() should return 1 (indicating an error) before it
> > >   violates #1.
> > 
> > Do we have any way for a driver to map different parts of a BAR
> > with different options?
> 
> You can get the region's address & size using pci_mapreg_info(),
> divide the region, and bus_space_map() each division with different
> options.
> 
> I don't think that we can divide a region in any old way, though.  The
> options may apply on the page level.

I don't think there's any MMU out there which could apply anything like this to 
something smaller than a page. No idea which granularity x86 MTRRs allow but 
it's probably not that small either.

That said, there are graphics chips out there which put video memory and 
registers into the same BAR - mach64, ct65550 and several others, on those we 
would want to map memory with prefetching and such enabled but not the 
registers. Many chips put the registers far enough away from the memory to 
avoid any page overlap ( ct65550 puts them in separate 4MB blocks ). Mach64 for 
example puts registers in the upper 2KB, but the worst that could happen here 
is that a few KB of video memory may get mapped without prefetching enabled.
So, there are good reasons for mapping different parts of a BAR with different 
options.

have fun
Michael