TLB tiredown by ASID bump

["Toru Nishimura" <locore64%alkyltechnology.com@localhost>]

There are growing number of CPU architecture which have
ASID to extend TLB VA->PA translation and improve runtime
TLB efficiency.  ASID switching is the least cost MMU
operation to make multiple processes run simultaneously.
ASID eliminates the necessity to discard whole TLB context
on each context switch.

Bumping ASID is a good way to invalidate TLB entries
which belong to a process.  By assigning a new ASID, old
stale TLB entries are discarded effectively.  This is the case
when some large portion of process address space protection
is changed.  Since common TLB size ranges 32 ~ 64, it would
be pretty inefficient and probably senseless to repeat the large
number of TLB invalidate operation for every page being
changed.  TLB size is small and the most of invalidate ops end
with failing to find the target entries anyway.  For the occasion
it would be ok to schedule ASID bump operation to fire at
exception return path to user context.  When fired, user context
restarts to fetch fresh TLB entries invoking TLBmiss like as
initial exec.

ASID is also in effect for process termination.  The ASID,
combined with a generation number, is unique to the each
process, there is no necessity to discard TLB entries when
a process is about to exit.  It's ok to leave stale entries in
TLB.  They will be overwritten by other processes shortly.

Bumping ASID makes sense for multi-core SMP too.  It
is to shoot down (tire down) potentially stale remote TLB
entries belongs to offending process.  It is the least cost
TLB shootdown implementation without practicing heavy
weight search and discard TLB operation triggered by IPI.
(Vahalia "UNIX Internal" book describes TLB consistency
book keeping by ASID bump at pp. 501 - 502)

I would propose here to add a new hook in exception return
path for every NetBSD ports.  The hook point is at right
after ast() call.  The hook is to call TLB ASID bump op
(to write EntryHi with a single mtc0 instruction for MIPS
architecture , for example).   It should be noted that the
hook is also useful to do "isync operation" for the process
which needs to invalidate instruction cache to continue.

Toru Nishimura / ALKYL Technology