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locking against myself in (soft) interrupt handler

working on a port to a new mips platform, I run into a
"locking against myself" when taking a clock interrupt, soon after
enabling interrupts. Interrupts are enabled at the end of cpu_configure()
which matches what other ports are doing.
This is running in a software emulator which is quite slow, and we take
a clock interrupt every 100000 CPU cycles, so it's likely happening much
sooner than usually on real hardware.
Here's the stack trace:
cpu_Debugger+4 (c04b3000,d,0,0) ra c020014c sz 0
panic+1d4 (c04b3000,d,0,0) ra c01f7418 sz 48
lockdebug_abort1+f8 (c04b3000,d,0,0) ra c01f81dc sz 40
lockdebug_abort+f8 (c04b3000,d,0,0) ra c01ca32c sz 56
mutex_vector_enter+28c (c04b3000,d,0,0) ra c01e8b68 sz 48
callout_hardclock+24 (c04b3000,d,0,0) ra c0285308 sz 32
xicu_intr+dc (fb03,800,c027b8cc,0) ra c027af6c sz 72
mips32_KernIntr+90 (fb01,0,c02b0000,0) ra c01ca530 sz 128
mutex_vector_exit+190 (fb01,0,c02b0000,0) ra c01c73c4 sz 32
lwp_create+198 (fb01,0,c2b98000,0) ra c01beccc sz 64
kthread_create+98 (fb01,0,c2b98000,0) ra c01f0a54 sz 104
configure2+b4 (fb01,0,c2b98000,0) ra c01a7248 sz 56
main+228 (fb01,0,c2b98000,0) ra c0100200 sz 72
kernel_text+200 (fb01,0,c2b98000,0) ra 0 sz -29180

Is it a bug in my platform's interrupt or clock setup (enabling clock
interrupts too soon maybe), in the MIPS interrupt or soft interrupt
stuff (I'm using stock sources from arch/mips/mips for this) or
in MI main() (doing some initialisation too late) ?

PS: for the curious, this is a research project, real hardware doesn't
exists (yet) :)

Manuel Bouyer, LIP6, Universite Paris VI.  
     NetBSD: 26 ans d'experience feront toujours la difference

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