CVS commit: src/sys/arch/i386/i386

["Rin Okuyama" <rin%netbsd.org@localhost>]

Module Name:    src
Committed By:   rin
Date:           Wed Sep 18 22:29:39 UTC 2024

Modified Files:
        src/sys/arch/i386/i386: db_interface.c

Log Message:
i386: DDB: Call x86_pause() (`pause` insn) when CPUs are paused

as already done for amd64:
https://mail-index.netbsd.org/source-changes/2023/07/31/msg146423.html

`pause` insn has been introduced to Pentium 4. However, its opcode is
consisted of `nop` (0x90) followed by `rep` prefix (0xf3), and therefore
interpreted as `nop` for older processors. Intel assured this behavior [1].

Also note that we already use `pause` unconditionally for i386.

Briefly tested on QEMU.

[1] Intel, ``AP-949 Using Spin-Loops on Intel Pentium 4 Processor and
    Intel Xeon Processor'', Version 2.1, Sec 2.1.1. (2001)


To generate a diff of this commit:
cvs rdiff -u -r1.88 -r1.89 src/sys/arch/i386/i386/db_interface.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.