CVS commit: src/sys/arch/riscv

["Nick Hudson" <skrll%netbsd.org@localhost>]

Module Name:    src
Committed By:   skrll
Date:           Mon Aug 19 07:33:56 UTC 2024

Modified Files:
        src/sys/arch/riscv/conf: GENERIC64
        src/sys/arch/riscv/starfive: jh71x0_clkc.c jh71x0_clkc.h
Added Files:
        src/sys/arch/riscv/starfive: jh7110_clkc.c

Log Message:
Add a clock driver for the JH7110 SoC found in the StarFive VisionFive 2
SBC.

It's not fully functional as something is wrong for the
Image-Signal-Process controller which is why it's #if 0'd out.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/riscv/conf/GENERIC64
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/starfive/jh7110_clkc.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/starfive/jh71x0_clkc.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/starfive/jh71x0_clkc.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.