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CVS commit: src/sys/arch/riscv



Module Name:    src
Committed By:   skrll
Date:           Tue Jan 16 09:06:47 UTC 2024

Modified Files:
        src/sys/arch/riscv/conf: GENERIC64 files.generic64
Added Files:
        src/sys/arch/riscv/starfive: files.starfive jh7100_clkc.c jh7100_clkc.h

Log Message:
risc-v: add a StarTech JH7100 SoC clock driver

The JH7100 is seen in the Beagle-V board.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/conf/GENERIC64
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/conf/files.generic64
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/starfive/files.starfive \
    src/sys/arch/riscv/starfive/jh7100_clkc.c \
    src/sys/arch/riscv/starfive/jh7100_clkc.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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