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CVS commit: src/sys/arch/riscv/riscv



Module Name:    src
Committed By:   simonb
Date:           Mon Oct 31 12:50:49 UTC 2022

Modified Files:
        src/sys/arch/riscv/riscv: bus_space_generic.S

Log Message:
In bus_space_write_{1,2,4,8} store the correct register in write to device.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/riscv/bus_space_generic.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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