CVS commit: src/usr.sbin/cpuctl/arch

["SAITOH Masanobu" <msaitoh%netbsd.org@localhost>]

Module Name:    src
Committed By:   msaitoh
Date:           Thu Dec  9 14:23:06 UTC 2021

Modified Files:
        src/usr.sbin/cpuctl/arch: i386.c

Log Message:
Print 1GB TLB entry at the same leve's line.

Example:
  before:
    cpu0: ITLB: 128 4KB entries 8-way, 2M/4M: 8 entries
    cpu0: DTLB: 64 4KB entries 4-way
    cpu0: L2 STLB: 4K/2M: 1024 entries
    cpu0: L1 1GB page DTLB: 4 1GB entries 4-way

  after:
    cpu0: ITLB: 128 4KB entries 8-way, 2M/4M: 8 entries
    cpu0: DTLB: 64 4KB entries 4-way, 4 1GB entries 4-way
    cpu0: L2 STLB: 4K/2M: 1024 entries


To generate a diff of this commit:
cvs rdiff -u -r1.123 -r1.124 src/usr.sbin/cpuctl/arch/i386.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.