CVS commit: src/sys/arch

["Nick Hudson" <skrll%netbsd.org@localhost>]

Module Name:    src
Committed By:   skrll
Date:           Thu Sep 23 06:34:00 UTC 2021

Modified Files:
        src/sys/arch/aarch64/aarch64: cpufunc.c
        src/sys/arch/arm/arm32: cpu.c

Log Message:
Print the cache information in similar formats and arm and aarch64, e.g.

arm before
[   1.0000000] cpu0: 32KB/64B 2-way L1 PIPT Instruction cache
[   1.0000000] cpu0: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache
[   1.0000000] cpu0: 2304KB/64B 16-way write-through L2 PIPT Unified cache

arm after
[   1.0000000] cpu0: L1 32KB/64B 2-way (256 set) PIPT Instruction cache
[   1.0000000] cpu0: L1 32KB/64B 2-way (256 set) write-back-locking-C PIPT Data cache
[   1.0000000] cpu0: L2 2304KB/64B 16-way (2304 set) write-through PIPT Unified cache

aarch64 before
[   1.0000030] cpu1: L1 48KB/64B*256L*3W PIPT Instruction cache
[   1.0000030] cpu1: L1 32KB/64B*256L*2W PIPT Data cache
[   1.0000030] cpu1: L2 2048KB/64B*2048L*16W PIPT Unified cache

aarch64 after
[   1.0000030] cpu1: L1 48KB/64B 3-way (256 set) PIPT Instruction cache
[   1.0000030] cpu1: L1 32KB/64B 2-way (256 set) PIPT Data cache
[   1.0000030] cpu1: L2 2048KB/64B 16-way (2048 set) PIPT Unified cache


To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/aarch64/aarch64/cpufunc.c
cvs rdiff -u -r1.148 -r1.149 src/sys/arch/arm/arm32/cpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.