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CVS commit: src/sys/arch/x86/x86



Module Name:    src
Committed By:   riastradh
Date:           Mon Jun 15 01:23:44 UTC 2020

Modified Files:
        src/sys/arch/x86/x86: cpu_rng.c

Log Message:
Use x86_read_psl/x86_disable_intr/x86_read_psl to defer interrupts.

Using x86_disable_intr/x86_enable_intr causes a bit of a snag when we
try it early at boot before we're ready to handle interrupts, because
it has the effect of enabling interrupts!

Fixes instant reset at boot on VIA CPUs.  The instant reset on boot
is new since the entropy rework, which initialized the x86 CPU RNG
earlier than before, but in principle this could also cause other
problems while not early at boot too.

XXX pullup


To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/x86/x86/cpu_rng.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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