CVS commit: src/sys/arch/powerpc/include

To: source-changes%NetBSD.org@localhost
Subject: CVS commit: src/sys/arch/powerpc/include
From: "Chuck Silvers" <chs%netbsd.org@localhost>
Date: Mon, 27 Feb 2017 06:54:43 +0000

Module Name:    src
Committed By:   chs
Date:           Mon Feb 27 06:54:43 UTC 2017

Modified Files:
        src/sys/arch/powerpc/include: fenv.h

Log Message:
update the FE0/FE1 MSR bits as needed when changing the exception mask.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/powerpc/include/fenv.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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