CVS commit: src/sys/arch/x86/x86

["Thor Lancelot Simon" <tls%netbsd.org@localhost>]

Module Name:    src
Committed By:   tls
Date:           Thu Feb 16 15:00:30 UTC 2017

Modified Files:
        src/sys/arch/x86/x86: identcpu.c

Log Message:
On i386 (but not on amd64) we can enable SSE comparatively very late, when
probing/attaching the FPU.  This is a problem for cpu_rng with the VIA
processors because, by design, cpu_rng attaches, and the entropy subsystem
starts up, very early.

If SSE is not enabled, calls to any "PadLock" instructions (ACE, RNG)
on the VIA processors will trap, per the manual:
        linux.via.com.tw/support/beginDownload.action?eleid=181&fid=261

All VIA CPUs with PadLock, or which match the model/stepping test as
possibly having PadLock, have SSE.  Just unconditionally enable it before
trying to turn the crypto block on.

Fixes crash at RNG attach time reported by Andrus V.; fix proposed by
jak@.


To generate a diff of this commit:
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/x86/x86/identcpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.