CVS commit: src/sys/arch/x86/x86

["Jean-Yves Migeon" <jym%netbsd.org@localhost>]

Module Name:    src
Committed By:   jym
Date:           Sun Oct  4 21:08:30 UTC 2015

Modified Files:
        src/sys/arch/x86/x86: cpu_ucode_intel.c

Log Message:
Cache CPU index in the non-preemptible part otherwise it can be
unreliable (and report a CPU as patched while it was not).


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/x86/x86/cpu_ucode_intel.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.