CVS commit: [netbsd-6] src/sys/arch/x86/include

["Martin Husemann" <martin%netbsd.org@localhost>]

Module Name:    src
Committed By:   martin
Date:           Mon Dec 29 15:31:06 UTC 2014

Modified Files:
        src/sys/arch/x86/include [netbsd-6]: specialreg.h

Log Message:
Pull up the following revisisions, requested by msaitoh in #1220:

sys/arch/x86/include/specialreg.h               1.59-1.71, 1.73-1.81 (patch)

        Update x86 special register definitions:
        - Add latest CR4 bits.
        - Recognize the P1GB and RDTSCP which were AMD-only on Intel HW too.
        - Add some missing bit definitions for CPUID2 and those for XCR0.
        - Fix CPUID_AMD_FLAGS4 to not try to print bits \41 and \42.
        - Correct the comment about the extended family and model bits.
        - Add some definitions related to the process extended state
          enumeration.
        - Add Intel Structured Extended Feature leaf (Fn0000_0007).
        - Sort CPUID definitions in initial EAX value.
        - Add Intel Deterministic Cache Parameter Leaf (CPUID leaf 4).
        - Add some AMD Fn80000001 extended features %ecx bits definitions.
        - "s/MXX/MMXX/" because this bit is "MMX eXtention".
        - Add some definitions for cpu 'extended state' enumeration
          (Fn0000000d).
        - Add Energy Performance Bias bit of Fn0000_0006 %ecx.
        - Add MSR_IA32_PLATFORM_ID (0x017)
        - Modify comment.
        - Style fix.


To generate a diff of this commit:
cvs rdiff -u -r1.55.2.3 -r1.55.2.4 src/sys/arch/x86/include/specialreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.