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CVS commit: src/sys/arch/arm/arm



Module Name:    src
Committed By:   skrll
Date:           Wed Oct 29 10:56:19 UTC 2014

Modified Files:
        src/sys/arch/arm/arm: ast.c

Log Message:
If our ASID got released and access via TTBR0 is disable make sure we
re-activate the lwp before calling mi_userret; otherwise bad things
happen, e.g. for signals.


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/ast.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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