CVS commit: src/sys/arch/mips/mips

["Nick Hudson" <skrll%netbsd.org@localhost>]

Module Name:    src
Committed By:   skrll
Date:           Tue May 27 15:56:18 UTC 2014

Modified Files:
        src/sys/arch/mips/mips: bus_dma.c

Log Message:
Optimise the BUS_DMASYNC_PREREAD operation by only using wbinv for partial
cachelines. Full cachelines are now invalidated only.

>From the same change in various mips ports not least cobalt.


To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/mips/mips/bus_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.