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CVS commit: src/sys/arch/mips/mips
Module Name: src
Committed By: matt
Date: Fri Aug 23 07:15:08 UTC 2013
When decide to coalesce segments, if the d_cache isn't coherent also make
sure the VA is contiguous as well.
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/mips/mips/bus_dma.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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