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CVS commit: src/sys/dev/pci

Module Name:    src
Committed By:   msaitoh
Date:           Wed Apr 17 08:07:40 UTC 2013

Modified Files:
        src/sys/dev/pci: pci_subr.c

Log Message:
 Don't check whether PCIe Slot Control Register is all 0 or not.
For example, 82801I PCI Express Port #1 (devid 0x2940) is really
Root Port and it has the Root Control Register and the default
value is 0 (the document say so and really 0 (Tested with my

To generate a diff of this commit:
cvs rdiff -u -r1.101 -r1.102 src/sys/dev/pci/pci_subr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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