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CVS commit: src/sys/arch/arm/include
Module Name: src
Committed By: matt
Date: Wed Aug 29 07:04:15 UTC 2012
Add required dsb/dmb instructions (or placeholders for them) required for
the weak memory ordering of the ARMV7-A architecture.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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