[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
CVS commit: src/sys/arch/arm/marvell
Module Name: src
Committed By: jakllsch
Date: Sun Jul 22 16:52:52 UTC 2012
When disabling watchdog timer, do not set the counter to 0.
Having the watchdog counter at 0 and having WDRstOutEn set to 1 causes
immediate watchdog reset on my 88F5182 A2.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/marvell/mvsoctmr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Main Index |
Thread Index |