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CVS commit: src/sys/arch/mips/mips

Module Name:    src
Committed By:   kiyohara
Date:           Sun Dec 25 11:51:16 UTC 2011

Modified Files:
        src/sys/arch/mips/mips: bds_emul.S

Log Message:
Fix TLB-miss.  Don't overwrite t0 before use.

To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/mips/bds_emul.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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