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CVS commit: src/sys/dev/isa
Module Name: src
Committed By: jakllsch
Date: Sun Jul 31 18:23:46 UTC 2011
The Fintek base address registers implement the bottom 3 bits as read/write,
but the address decoder in the chip ignores these three bits. Do the same.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/dev/isa/finsio_isa.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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