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CVS commit: src/sys/arch/algor

Module Name:    src
Committed By:   dyoung
Date:           Fri Jul  1 18:31:32 UTC 2011

Modified Files:
        src/sys/arch/algor/dev: bonito_mainbus.c com_mainbus.c lpt_mainbus.c
            mainbus.c mcclock_mainbus.c vtpbc_mainbus.c
        src/sys/arch/algor/isa: isadma_bounce.c mcclock_isa.c
        src/sys/arch/algor/pci: pcib.c vtpbc.c

Log Message:
#include <sys/bus.h> instead of <machine/bus.h>.

To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/algor/dev/bonito_mainbus.c \
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/algor/dev/lpt_mainbus.c \
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/algor/dev/mainbus.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/algor/dev/vtpbc_mainbus.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/algor/isa/isadma_bounce.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/algor/isa/mcclock_isa.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/algor/pci/pcib.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/algor/pci/vtpbc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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