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CVS commit: src/sys/uvm
Module Name: src
Committed By: matt
Date: Mon Jan 24 19:13:55 UTC 2011
Fix start_hint in "simple" alloc (fencepost error).
When restarting the loop, make sure end is not above current limit.
Do a quick test to see if the physseg is within the range of desired addresses.
To generate a diff of this commit:
cvs rdiff -u -r1.56 -r1.57 src/sys/uvm/uvm_pglist.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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