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CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi

Module Name:    src
Committed By:   cliff
Date:           Mon Sep 20 19:40:11 UTC 2010

Modified Files:
        src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_spl.S

Log Message:
- .set noreorder up top to avoid instruction reordering
- adopt bugfix suggested by Manuel Boyer for mips/spl.S:
in _splraise and _splsw_splhigh, reload L_CPU in case we were
preempted prior to interrupts being blocked (thanks).

To generate a diff of this commit:
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_spl.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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