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CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi

Module Name:    src
Committed By:   cliff
Date:           Mon Sep 20 19:42:31 UTC 2010

Modified Files:
        src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcie.c rmixl_pcievar.h
            rmixl_pcix.c rmixl_pcixvar.h

Log Message:
- provide lockless interrupt dispatch by eliminating use of LIST(9)
for interrupt handles.  Handles are now managed in variable size arrays.
Establishing a new interrupt causes allocation of a new array, pointer
to which is changed atomically.  Old arrays are allowed to persist for
some time before free, allowing any CPU working with that data
to safely finish using it.
- interrupt events are now managed per-CPU, avoid need for atomic adds.

To generate a diff of this commit:
cvs rdiff -u -r1.1.2.15 -r1.1.2.16 src/sys/arch/mips/rmi/rmixl_pcie.c
cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixl_pcievar.h
cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/rmi/rmixl_pcix.c
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_pcixvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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