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CVS commit: src/sys

Module Name:    src
Committed By:   jruoho
Date:           Sat Aug 21 03:55:24 UTC 2010

Modified Files:
        src/sys/arch/x86/acpi: acpi_cpu_md.c
        src/sys/dev/acpi: acpi_cpu.h

Log Message:
Detect whether TSC is invariant, which may be the case on both new AMD and
Intel processors. The invariance means that TSC runs at a constant rate
during all ACPI state changes. If it is variant, skew may occur and TSC is
generally unsuitable for wall clock services. This is especially relevant
with C-states; with variant TSC, the whole counter may be stopped with states
larger than C1. All x86 CPUs before circa mid-2000s can be assumed to have a
variant time stamp counter.

To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/x86/acpi/acpi_cpu_md.c
cvs rdiff -u -r1.20 -r1.21 src/sys/dev/acpi/acpi_cpu.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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