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CVS commit: src/sys/arch/x86/x86

Module Name:    src
Committed By:   mrg
Date:           Sun Aug 15 08:45:20 UTC 2010

Modified Files:
        src/sys/arch/x86/x86: coretemp.c

Log Message:
only attach on SMT ID 0 cpus.

on my i7, cpus 0/4, 1/5, 2/6 and 3/7 have identical information and the
processor manual says that there are only 4 actual sensors.

this still doesn't attach (yet) on that system, due to a core solo/duo
errata being wrongly applied, but i haven't figured out the right way
to do that.

To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/x86/x86/coretemp.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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