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CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi

Module Name:    src
Committed By:   cliff
Date:           Fri Jan 29 00:23:54 UTC 2010

Modified Files:
        src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcie.c

Log Message:
- rmixl_cache_err_dis, rmixl_cache_err_restore, rmixl_cache_err_check
  inlines moved from here ro rmixlvar.h
- add a layer of interrupt dispatch to allow sharing link interrupts,
- enable and handle pcie link error interrupts
- initialize the PCIe INT and MSI config regs, make sure MSI ints are disabled!
- improve display names for link configurations
- be more thorough about 'mips_cpu_id' based variations

To generate a diff of this commit:
cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixl_pcie.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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