CVS commit: [matt-nb5-mips64] src/sys/arch/mips

[Matt Thomas <matt%netbsd.org@localhost>]

Module Name:    src
Committed By:   matt
Date:           Sat Jan 16 20:56:33 UTC 2010

Modified Files:
        src/sys/arch/mips/include [matt-nb5-mips64]: asm.h
        src/sys/arch/mips/mips [matt-nb5-mips64]: genassym.cf locore_mips1.S
            mips32_subr.S mips3_subr.S mips5900_subr.S mips64_subr.S
            mipsX_subr.S mips_machdep.c

Log Message:
Rework the exception code.  All the exceptions (except for mips3_5900) are
now padded to 128 bytes each and placed in the right order so they can be
copied with one memcpy.  This also allows us to branch to unused space space
since the relative locations will remain the same.

When leaving the exception vectors, k1 will now always contain the address
of CURLWP for that CPU.  The rest of the exception code no longer needs (and
is not allowed to) to access CPUVAR(CURLWP).

kill outofworld and just let trap panic, if it can.  Allow for sb1_subr.S
or rmixl_subr.S in the future.  Fix TLB read/write code.


To generate a diff of this commit:
cvs rdiff -u -r1.40.38.10 -r1.40.38.11 src/sys/arch/mips/include/asm.h
cvs rdiff -u -r1.44.12.8 -r1.44.12.9 src/sys/arch/mips/mips/genassym.cf
cvs rdiff -u -r1.64.26.1.2.3 -r1.64.26.1.2.4 \
    src/sys/arch/mips/mips/locore_mips1.S
cvs rdiff -u -r1.3 -r1.3.96.1 src/sys/arch/mips/mips/mips32_subr.S \
    src/sys/arch/mips/mips/mips3_subr.S src/sys/arch/mips/mips/mips64_subr.S
cvs rdiff -u -r1.4 -r1.4.96.1 src/sys/arch/mips/mips/mips5900_subr.S
cvs rdiff -u -r1.26.36.1.2.17 -r1.26.36.1.2.18 \
    src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r1.205.4.1.2.1.2.25 -r1.205.4.1.2.1.2.26 \
    src/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.