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CVS commit: src/sys/arch/x86/pci
Module Name: src
Committed By: mrg
Date: Tue Mar 3 06:05:28 UTC 2009
Modified Files:
src/sys/arch/x86/pci: ichlpcib.c
Log Message:
don't enable speedstep on systems with intel 82855GM host bridges.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/x86/pci/ichlpcib.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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