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CVS commit: src/sys/dev/pci
Module Name: src
Committed By: tls
Date: Tue Jan 29 20:24:41 UTC 2008
Sigh. What was meant here was an ITR register value of 1500, for 2604
interrupts/sec -- not the other way around. Caught by yamt.
When I can confirm that it won't lock the chip up on the models claimed
to be problematic, I'll probably adjust the packet timers a bit further
to see if I can get latency down under low load. But this should be
To generate a diff of this commit:
cvs rdiff -r1.152 -r1.153 src/sys/dev/pci/if_wm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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