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CVS commit: syssrc/sys/arch/i386/i386



Module Name:    syssrc
Committed By:   fredb
Date:           Mon Aug 26 22:36:25 UTC 2002

Modified Files:
        syssrc/sys/arch/i386/i386: mtrr_k6.c

Log Message:
Follow AMD's recommendations for programming the uncachable/write-combine
bits of the K6 cache-control-register: disable the cache; flush the cache;
set the bits; re-enable the cache (all much like programming the pentium
mtrr's). See reference posted to tech-kern; also review there by thorpej.


To generate a diff of this commit:
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/i386/i386/mtrr_k6.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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