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CVS commit: syssrc/sys/arch/powerpc/powerpc



Module Name:    syssrc
Committed By:   dbj
Date:           Thu Dec 27 10:25:42 UTC 2001

Modified Files:
        syssrc/sys/arch/powerpc/powerpc: db_memrw.c

Log Message:
sync the instruction cache even when only writing 2 or 4 bytes


To generate a diff of this commit:
cvs rdiff -r1.4 -r1.5 syssrc/sys/arch/powerpc/powerpc/db_memrw.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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