CVS commit: src

[Tohru Nishimura <nisimura%netbsd.org@localhost>]

Module Name:    src
Committed By:   nisimura
Date:           Thu Apr  8 03:14:36 UTC 1999

Modified Files:
        src/sys/arch/pmax/include: bus.h
Log Message:
- MIPS processors do not require to have memory barrier prior to read ops.