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CVS commit: src
Module Name: src
Committed By: mycroft
Date: Mon Aug 10 01:25:34 UTC 1998
Modified Files:
src/sys/dev/isa: sbdsp.c
Log Message:
For models prior to the SB16, there is only one clock divider, so couple the
sample rates. However, only do this if both play and record are being used
simultaneously; otherwise we can't play 22KHz on the SB1.
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