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[src/trunk]: src/sys add new ethernet driver mvxpe for recent MARVELL's SoC a...
details: https://anonhg.NetBSD.org/src/rev/c5538039703a
branches: trunk
changeset: 337918:c5538039703a
user: hsuenaga <hsuenaga%NetBSD.org@localhost>
date: Sun May 03 14:38:09 2015 +0000
description:
add new ethernet driver mvxpe for recent MARVELL's SoC after ARMADA/XP.
this driver supports 'counter mode', and is disabled by default.
ARMADA SoC family has new ethernet controller acceleration mode called
'enhanced mode' or 'counter mode.' it seems that backward compatibility mode
used by if_mvgbe is still working, but the specification of the old mode
is completely disappeared from SoC's reference manual.
I tested the driver using MIRABOX(ARMADA/370).
diffstat:
sys/arch/arm/marvell/files.marvell | 8 +-
sys/arch/arm/marvell/mvsoc.c | 44 +-
sys/arch/evbarm/armadaxp/armadaxp_machdep.c | 30 +-
sys/arch/evbarm/marvell/marvellvar.h | 5 +-
sys/dev/marvell/if_mvxpe.c | 3501 +++++++++++++++++++++++++++
sys/dev/marvell/if_mvxpereg.h | 890 ++++++
sys/dev/marvell/if_mvxpevar.h | 573 ++++
7 files changed, 5044 insertions(+), 7 deletions(-)
diffs (truncated from 5196 to 300 lines):
diff -r aac0b35dea35 -r c5538039703a sys/arch/arm/marvell/files.marvell
--- a/sys/arch/arm/marvell/files.marvell Sun May 03 12:29:28 2015 +0000
+++ b/sys/arch/arm/marvell/files.marvell Sun May 03 14:38:09 2015 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.marvell,v 1.13 2014/03/18 07:25:57 matt Exp $
+# $NetBSD: files.marvell,v 1.14 2015/05/03 14:38:09 hsuenaga Exp $
#
# Configuration info for Marvell System on Chip support
#
@@ -57,6 +57,12 @@
# Gigabit Ethernet Controller Interface
attach mvgbec at mvsoc with mvgbec_mbus
+# ARMADA XP Gigabit Ethernet Controller Interface
+define mvxpe { [port = -1 ], [irq = -1] }
+device mvxpe: ether, ifnet, arp, mii
+attach mvxpe at mvsoc with mvxpe_mbus
+file dev/marvell/if_mvxpe.c mvxpe needs-flag
+
# USB 2.0 Interface
attach ehci at mvsoc with mvusb_mbus
diff -r aac0b35dea35 -r c5538039703a sys/arch/arm/marvell/mvsoc.c
--- a/sys/arch/arm/marvell/mvsoc.c Sun May 03 12:29:28 2015 +0000
+++ b/sys/arch/arm/marvell/mvsoc.c Sun May 03 14:38:09 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc.c,v 1.18 2014/03/15 11:48:37 kiyohara Exp $ */
+/* $NetBSD: mvsoc.c,v 1.19 2015/05/03 14:38:09 hsuenaga Exp $ */
/*
* Copyright (c) 2007, 2008, 2013, 2014 KIYOHARA Takashi
* All rights reserved.
@@ -26,10 +26,11 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.18 2014/03/15 11:48:37 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.19 2015/05/03 14:38:09 hsuenaga Exp $");
#include "opt_cputypes.h"
#include "opt_mvsoc.h"
+#include "mvxpe.h"
#include <sys/param.h>
#include <sys/bus.h>
@@ -675,9 +676,14 @@
{ ARMADAXP(MV78130), "mvsata", 0, ARMADAXP_SATAHC_BASE,ARMADAXP_IRQ_SATA0 },
{ ARMADAXP(MV78130), "mvspi", 0, ARMADAXP_SPI_BASE,ARMADAXP_IRQ_SPI },
{ ARMADAXP(MV78130), "mvsdio", 0, ARMADAXP_SDIO_BASE,ARMADAXP_IRQ_SDIO },
- { ARMADAXP(MV78130), "mvgbec", 0, ARMADAXP_GBE0_BASE,IRQ_DEFAULT },
+ { ARMADAXP(MV78130), "mvxpe", 0, ARMADAXP_GBE0_BASE,ARMADAXP_IRQ_GBE0_TH_RXTX },
+#if NMVXPE > 0
+ { ARMADAXP(MV78130), "mvxpe", 1, ARMADAXP_GBE1_BASE,ARMADAXP_IRQ_GBE1_TH_RXTX },
+ { ARMADAXP(MV78130), "mvxpe", 2, ARMADAXP_GBE2_BASE,ARMADAXP_IRQ_GBE2_TH_RXTX },
+#else
{ ARMADAXP(MV78130), "mvgbec", 1, ARMADAXP_GBE1_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78130), "mvgbec", 2, ARMADAXP_GBE2_BASE,IRQ_DEFAULT },
+#endif
{ ARMADAXP(MV78130), "mvcesa", 0, ARMADAXP_CESA0_BASE,ARMADAXP_IRQ_CESA0 },
{ ARMADAXP(MV78130), "mvcesa", 1, ARMADAXP_CESA1_BASE,ARMADAXP_IRQ_CESA1 },
@@ -702,10 +708,17 @@
{ ARMADAXP(MV78160), "mvsata", 0, ARMADAXP_SATAHC_BASE,ARMADAXP_IRQ_SATA0 },
{ ARMADAXP(MV78160), "mvspi", 0, ARMADAXP_SPI_BASE,ARMADAXP_IRQ_SPI },
{ ARMADAXP(MV78160), "mvsdio", 0, ARMADAXP_SDIO_BASE,ARMADAXP_IRQ_SDIO },
+#if NMVXPE > 0
+ { ARMADAXP(MV78160), "mvxpe", 0, ARMADAXP_GBE0_BASE,ARMADAXP_IRQ_GBE0_TH_RXTX },
+ { ARMADAXP(MV78160), "mvxpe", 1, ARMADAXP_GBE1_BASE,ARMADAXP_IRQ_GBE1_TH_RXTX },
+ { ARMADAXP(MV78160), "mvxpe", 2, ARMADAXP_GBE2_BASE,ARMADAXP_IRQ_GBE2_TH_RXTX },
+ { ARMADAXP(MV78160), "mvxpe", 3, ARMADAXP_GBE3_BASE,ARMADAXP_IRQ_GBE3_TH_RXTX },
+#else
{ ARMADAXP(MV78160), "mvgbec", 0, ARMADAXP_GBE0_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78160), "mvgbec", 1, ARMADAXP_GBE1_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78160), "mvgbec", 2, ARMADAXP_GBE2_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78160), "mvgbec", 3, ARMADAXP_GBE3_BASE,IRQ_DEFAULT },
+#endif
{ ARMADAXP(MV78160), "mvcesa", 0, ARMADAXP_CESA0_BASE,ARMADAXP_IRQ_CESA0 },
{ ARMADAXP(MV78160), "mvcesa", 1, ARMADAXP_CESA1_BASE,ARMADAXP_IRQ_CESA1 },
@@ -730,9 +743,15 @@
{ ARMADAXP(MV78230), "mvsata", 0, ARMADAXP_SATAHC_BASE,ARMADAXP_IRQ_SATA0 },
{ ARMADAXP(MV78230), "mvspi", 0, ARMADAXP_SPI_BASE,ARMADAXP_IRQ_SPI },
{ ARMADAXP(MV78230), "mvsdio", 0, ARMADAXP_SDIO_BASE,ARMADAXP_IRQ_SDIO },
+#if NMVXPE > 0
+ { ARMADAXP(MV78230), "mvxpe", 0, ARMADAXP_GBE0_BASE,ARMADAXP_IRQ_GBE0_TH_RXTX },
+ { ARMADAXP(MV78230), "mvxpe", 1, ARMADAXP_GBE1_BASE,ARMADAXP_IRQ_GBE1_TH_RXTX },
+ { ARMADAXP(MV78230), "mvxpe", 2, ARMADAXP_GBE2_BASE,ARMADAXP_IRQ_GBE2_TH_RXTX },
+#else
{ ARMADAXP(MV78230), "mvgbec", 0, ARMADAXP_GBE0_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78230), "mvgbec", 1, ARMADAXP_GBE1_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78230), "mvgbec", 2, ARMADAXP_GBE2_BASE,IRQ_DEFAULT },
+#endif
{ ARMADAXP(MV78230), "mvcesa", 0, ARMADAXP_CESA0_BASE,ARMADAXP_IRQ_CESA0 },
{ ARMADAXP(MV78230), "mvcesa", 1, ARMADAXP_CESA1_BASE,ARMADAXP_IRQ_CESA1 },
@@ -757,10 +776,17 @@
{ ARMADAXP(MV78260), "mvsata", 0, ARMADAXP_SATAHC_BASE,ARMADAXP_IRQ_SATA0 },
{ ARMADAXP(MV78260), "mvspi", 0, ARMADAXP_SPI_BASE,ARMADAXP_IRQ_SPI },
{ ARMADAXP(MV78260), "mvsdio", 0, ARMADAXP_SDIO_BASE,ARMADAXP_IRQ_SDIO },
+#if NMVXPE > 0
+ { ARMADAXP(MV78260), "mvxpe", 0, ARMADAXP_GBE0_BASE,ARMADAXP_IRQ_GBE0_TH_RXTX },
+ { ARMADAXP(MV78260), "mvxpe", 1, ARMADAXP_GBE1_BASE,ARMADAXP_IRQ_GBE1_TH_RXTX },
+ { ARMADAXP(MV78260), "mvxpe", 2, ARMADAXP_GBE2_BASE,ARMADAXP_IRQ_GBE2_TH_RXTX },
+ { ARMADAXP(MV78260), "mvxpe", 3, ARMADAXP_GBE3_BASE,ARMADAXP_IRQ_GBE3_TH_RXTX },
+#else
{ ARMADAXP(MV78260), "mvgbec", 0, ARMADAXP_GBE0_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78260), "mvgbec", 1, ARMADAXP_GBE1_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78260), "mvgbec", 2, ARMADAXP_GBE2_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78260), "mvgbec", 3, ARMADAXP_GBE3_BASE,IRQ_DEFAULT },
+#endif
{ ARMADAXP(MV78260), "mvcesa", 0, ARMADAXP_CESA0_BASE,ARMADAXP_IRQ_CESA0 },
{ ARMADAXP(MV78260), "mvcesa", 1, ARMADAXP_CESA1_BASE,ARMADAXP_IRQ_CESA1 },
@@ -786,10 +812,17 @@
{ ARMADAXP(MV78460), "mvsata", 0, ARMADAXP_SATAHC_BASE,ARMADAXP_IRQ_SATA0 },
{ ARMADAXP(MV78460), "mvspi", 0, ARMADAXP_SPI_BASE,ARMADAXP_IRQ_SPI },
{ ARMADAXP(MV78460), "mvsdio", 0, ARMADAXP_SDIO_BASE,ARMADAXP_IRQ_SDIO },
+#if NMVXPE > 0
+ { ARMADAXP(MV78460), "mvxpe", 0, ARMADAXP_GBE0_BASE,ARMADAXP_IRQ_GBE0_TH_RXTX },
+ { ARMADAXP(MV78460), "mvxpe", 1, ARMADAXP_GBE1_BASE,ARMADAXP_IRQ_GBE1_TH_RXTX },
+ { ARMADAXP(MV78460), "mvxpe", 2, ARMADAXP_GBE2_BASE,ARMADAXP_IRQ_GBE2_TH_RXTX },
+ { ARMADAXP(MV78460), "mvxpe", 3, ARMADAXP_GBE3_BASE,ARMADAXP_IRQ_GBE3_TH_RXTX },
+#else
{ ARMADAXP(MV78460), "mvgbec", 0, ARMADAXP_GBE0_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78460), "mvgbec", 1, ARMADAXP_GBE1_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78460), "mvgbec", 2, ARMADAXP_GBE2_BASE,IRQ_DEFAULT },
{ ARMADAXP(MV78460), "mvgbec", 3, ARMADAXP_GBE3_BASE,IRQ_DEFAULT },
+#endif
{ ARMADAXP(MV78460), "mvcesa", 0, ARMADAXP_CESA0_BASE,ARMADAXP_IRQ_CESA0 },
{ ARMADAXP(MV78460), "mvcesa", 1, ARMADAXP_CESA1_BASE,ARMADAXP_IRQ_CESA1 },
@@ -808,8 +841,13 @@
{ ARMADA370(MV6710), "mvspi", 0, ARMADAXP_SPI_BASE,ARMADAXP_IRQ_SPI },
{ ARMADA370(MV6710), "mvspi", 1, ARMADAXP_SPI_BASE,ARMADAXP_IRQ_SPI },
{ ARMADA370(MV6710), "mvsdio", 0, ARMADAXP_SDIO_BASE,ARMADAXP_IRQ_SDIO },
+#if NMVXPE > 0
+ { ARMADA370(MV6710), "mvxpe", 0, ARMADAXP_GBE0_BASE,ARMADAXP_IRQ_GBE0_TH_RXTX },
+ { ARMADA370(MV6710), "mvxpe", 1, ARMADAXP_GBE1_BASE,ARMADAXP_IRQ_GBE1_TH_RXTX },
+#else
{ ARMADA370(MV6710), "mvgbec", 0, ARMADAXP_GBE0_BASE,IRQ_DEFAULT },
{ ARMADA370(MV6710), "mvgbec", 1, ARMADAXP_GBE1_BASE,IRQ_DEFAULT },
+#endif
{ ARMADA370(MV6710), "mvcesa", 0, ARMADAXP_CESA0_BASE,ARMADAXP_IRQ_CESA0 },
#endif
};
diff -r aac0b35dea35 -r c5538039703a sys/arch/evbarm/armadaxp/armadaxp_machdep.c
--- a/sys/arch/evbarm/armadaxp/armadaxp_machdep.c Sun May 03 12:29:28 2015 +0000
+++ b/sys/arch/evbarm/armadaxp/armadaxp_machdep.c Sun May 03 14:38:09 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armadaxp_machdep.c,v 1.10 2015/04/15 10:30:42 hsuenaga Exp $ */
+/* $NetBSD: armadaxp_machdep.c,v 1.11 2015/05/03 14:38:10 hsuenaga Exp $ */
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
@@ -37,7 +37,7 @@
*******************************************************************************/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadaxp_machdep.c,v 1.10 2015/04/15 10:30:42 hsuenaga Exp $");
+__KERNEL_RCSID(0, "$NetBSD: armadaxp_machdep.c,v 1.11 2015/05/03 14:38:10 hsuenaga Exp $");
#include "opt_machdep.h"
#include "opt_mvsoc.h"
@@ -66,6 +66,7 @@
#include <dev/cons.h>
#include <dev/md.h>
+#include <dev/marvell/marvellreg.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <machine/pci_machdep.h>
@@ -640,5 +641,30 @@
prop_dictionary_set(dict, "mac-address", pd);
}
}
+ if (device_is_a(dev, "mvxpe")) {
+ uint8_t enaddr[ETHER_ADDR_LEN];
+ char optname[9];
+ int unit = device_unit(dev);
+
+ if (unit > 9)
+ return;
+ switch (unit) {
+ case 0:
+ strlcpy(optname, "ethaddr", sizeof(optname));
+ break;
+ default:
+ /* eth1addr ... eth9addr */
+ snprintf(optname, sizeof(optname),
+ "eth%daddr", unit);
+ break;
+ }
+ if (get_bootconf_option(boot_args, optname,
+ BOOTOPT_TYPE_MACADDR, enaddr)) {
+ prop_data_t pd =
+ prop_data_create_data(enaddr, sizeof(enaddr));
+
+ prop_dictionary_set(dict, "mac-address", pd);
+ }
+ }
#endif
}
diff -r aac0b35dea35 -r c5538039703a sys/arch/evbarm/marvell/marvellvar.h
--- a/sys/arch/evbarm/marvell/marvellvar.h Sun May 03 12:29:28 2015 +0000
+++ b/sys/arch/evbarm/marvell/marvellvar.h Sun May 03 14:38:09 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: marvellvar.h,v 1.3 2014/03/18 07:30:09 matt Exp $ */
+/* $NetBSD: marvellvar.h,v 1.4 2015/05/03 14:38:10 hsuenaga Exp $ */
/*
* Copyright (c) 2007 KIYOHARA Takashi
* All rights reserved.
@@ -26,6 +26,9 @@
*/
#ifndef _EVBARM_MARVELLVAR_H_
#define _EVBARM_MARVELLVAR_H_
+#ifndef _LOCORE
+#include <machine/bus_defs.h>
+#endif
/*
* Logical mapping for onboard/integrated peripherals
diff -r aac0b35dea35 -r c5538039703a sys/dev/marvell/if_mvxpe.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/dev/marvell/if_mvxpe.c Sun May 03 14:38:09 2015 +0000
@@ -0,0 +1,3501 @@
+/* $NetBSD: if_mvxpe.c,v 1.1 2015/05/03 14:38:10 hsuenaga Exp $ */
+/*
+ * Copyright (c) 2015 Internet Initiative Japan Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: if_mvxpe.c,v 1.1 2015/05/03 14:38:10 hsuenaga Exp $");
+
+#include "opt_multiprocessor.h"
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/callout.h>
+#include <sys/device.h>
+#include <sys/endian.h>
+#include <sys/errno.h>
+#include <sys/evcnt.h>
+#include <sys/kernel.h>
+#include <sys/kmem.h>
+#include <sys/mutex.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/syslog.h>
+#include <sys/rndsource.h>
+
+#include <net/if.h>
+#include <net/if_ether.h>
+#include <net/if_media.h>
+#include <net/bpf.h>
+
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/ip.h>
+
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+
+#include <dev/marvell/marvellreg.h>
+#include <dev/marvell/marvellvar.h>
+#include <dev/marvell/if_mvxpereg.h>
+#include <dev/marvell/if_mvxpevar.h>
+
+#include "locators.h"
+
+#if BYTE_ORDER == BIG_ENDIAN
+#error "BIG ENDIAN not supported"
+#endif
+
+#ifdef MVXPE_DEBUG
+#define STATIC /* nothing */
+#else
+#define STATIC static
+#endif
+
+/* autoconf(9) */
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