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[src/trunk]: src/sys/arch/arm/allwinner pll2 enable support



details:   https://anonhg.NetBSD.org/src/rev/1cb52c361b20
branches:  trunk
changeset: 332000:1cb52c361b20
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Thu Sep 04 02:36:08 2014 +0000

description:
pll2 enable support

diffstat:

 sys/arch/arm/allwinner/awin_board.c |  28 ++++++++++++++++++++++++++--
 sys/arch/arm/allwinner/awin_var.h   |   3 ++-
 2 files changed, 28 insertions(+), 3 deletions(-)

diffs (63 lines):

diff -r e4d78d97a6b3 -r 1cb52c361b20 sys/arch/arm/allwinner/awin_board.c
--- a/sys/arch/arm/allwinner/awin_board.c       Thu Sep 04 02:35:26 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_board.c       Thu Sep 04 02:36:08 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: awin_board.c,v 1.15 2014/08/24 12:42:03 jmcneill Exp $ */
+/*     $NetBSD: awin_board.c,v 1.16 2014/09/04 02:36:08 jmcneill Exp $ */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -35,7 +35,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.15 2014/08/24 12:42:03 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.16 2014/09/04 02:36:08 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -275,3 +275,27 @@
            __SHIFTOUT(ncfg, AWIN_PLL_CFG_FACTOR_M));
 #endif
 }
+
+void
+awin_pll2_enable(void)
+{
+       bus_space_tag_t bst = &awin_bs_tag;
+       bus_space_handle_t bsh = awin_core_bsh;
+
+       /*
+        * AC (at 48kHz) needs PLL2 to be 24576000 Hz
+        */
+       const uint32_t ocfg = bus_space_read_4(bst, bsh,
+           AWIN_CCM_OFFSET + AWIN_PLL2_CFG_REG);
+
+       uint32_t ncfg = ocfg;
+       ncfg &= ~(AWIN_PLL2_CFG_PREVDIV|AWIN_PLL2_CFG_FACTOR_N|AWIN_PLL2_CFG_POSTDIV);
+       ncfg |= __SHIFTIN(21, AWIN_PLL2_CFG_PREVDIV);
+       ncfg |= __SHIFTIN(86, AWIN_PLL2_CFG_FACTOR_N);
+       ncfg |= __SHIFTIN(4, AWIN_PLL2_CFG_POSTDIV);
+       ncfg |= AWIN_PLL_CFG_ENABLE;
+       if (ncfg != ocfg) {
+               bus_space_write_4(bst, bsh,
+                   AWIN_CCM_OFFSET + AWIN_PLL2_CFG_REG, ncfg);
+       }
+}
diff -r e4d78d97a6b3 -r 1cb52c361b20 sys/arch/arm/allwinner/awin_var.h
--- a/sys/arch/arm/allwinner/awin_var.h Thu Sep 04 02:35:26 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_var.h Thu Sep 04 02:36:08 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_var.h,v 1.10 2014/06/05 03:48:32 matt Exp $ */
+/* $NetBSD: awin_var.h,v 1.11 2014/09/04 02:36:08 jmcneill Exp $ */
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -81,6 +81,7 @@
 psize_t awin_memprobe(void);
 void   awin_bootstrap(vaddr_t, vaddr_t); 
 void   awin_dma_bootstrap(psize_t);
+void   awin_pll2_enable(void);
 void   awin_pll6_enable(void);
 void   awin_cpu_hatch(struct cpu_info *);
 



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