Re: CVS commit: src/sys/arch/sh3/sh3

[Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>]

uwe@ wrote:

> > Log Message:
> > Fix fallouts in rev 1.19:
> >  
> > http://www.nerv.org/~ryo/netbsd/netbsd/?q=id:20080316T191753Z.1654448ada03ce3c4668f3fe472796d0b771e147
> >  - revert RUN_P1 -> PAD_P1_SWITCH changes where RUN_P1 is
> >    actually required  (all icache CCIA ops still need RUN_P2)
> 
> Why is it required?  The return address is in P1, so the normal "ret"
> will jump back to P1.  Or is there some inlining I missed?

Ah, I misunderstood it since the log message didn't mention changes
in icache functions (assumed returning into P1).

I'll revert this first part.

> >  - sh4_dcache_wbinv_all() and sh4_dcache_wbinv_range_index()
> >    (which manipulate CCDA arrays) are no longer have RUN_P2 so
> >    we can't call them directly from sh4_icache_sync_all() and
> >    sh4_icache_sync_range_index() funcitons;  use function pointers
> >    (which have appropriate addresses) instead for 7750 and 7750S

---
Izumi Tsutsui