[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
Re: CVS commit: src/sys/arch/mips/mips
On Mon, Nov 08, 2010 at 06:09:39PM +0000, Antti Kantee wrote:
> Modified Files:
> src/sys/arch/mips/mips: locore_mips1.S
> Log Message:
> In TLBRead, restore PID before doing the saves so that the caller's
> TLB entries are used instead of the PID given as the argument.
> from Alessandro Forin
This doesn't make any sense.
As far as I can tell, the real problem is that the code is not
attending to pipeline hazards properly; moving things around until it
experimentally seems to work is just going to create other odd
behavior sometime down the line under different timing circumstances.
I don't have a mips1-specific reference on hand, but my recollection
is that you need *three* nops when messing with cop0 registers for all
effects to flush through.
Do you have any further explanations or reports of symptoms? I don't
see anything on any of the mips lists.
David A. Holland
Main Index |
Thread Index |