Den 2021-07-03 kl. 20:33, skrev john%ziaspace.com@localhost:
Me too :-) But I'm afraid that it require something else than a 15-year old low-end FPGA :-)This gives us an architecture that can be both superscalar and superpipelined (just like the Alpha :-) )IEEE floating point:The current floating point formats are very like IEEE formats (compared to other pre-IEEE formats).? The F, G and H matches in layout the IEEE Single, Double and Extended but the exponent bias is slightly different and subnormal values are missing. By adding the three IEEE formats I think it would require very few extra gates to make it behave like the DEC FP instead.Multiprocessor:Vax have had multiprocessor support since ~forever, but it may be a good idea to revise the interlock instructions. There are only 7 of them and a few more would be nice. Having it in a FPGA would make it simple to clone up many Vaxen in the same cheap chip :-)I, for one, welcome our multi-hundred-core, superscalar VAX supercomputer overlords.
Well, no VMS yet. But I don't know of any other VAX FPGA implementations (that are alive). (haven't searched deep for it though).Seriously, this would make pkgsrc bulk builds so much easier.Is this the first FPGA implementation of a processor that can natively run VMS?
-- R