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Re: VAX RPB (Restart Parameter Block)

Mouse wrote:

> >>>    cons_A_TX: blbc    1001(r11),0x20044f32
> > That 1001(r11) is my question to be exact.
> I think I said elsewhere in this thread - the longword whose low bit is
> being tested is at r11 + 1001 (since the disassembly came from my
> disassembler, I can fairly confidently say the 1001 is in hex).  So if
> the bit is in ffea01, r11 would have to hold ffda00.

> > T hink, the 1001 is a signed 32bit value that just adresses the 0x1
> > bit in the longword (r11) points to, is that correct?
> No.  The 1001 is a signed 16-bit value - it could be 32-bit instead,
> but I think it would have been disassembled as 00001001 in that case -
> which is added to what's in r11.  The sum is the address of the
> operand.  As for which bit is used, the blbc instruction always uses
> the least-significant bit; if you need to test some other bit, you need
> to use a different instruction (such as bbc, or cmpv plus an ordinary
> conditional branch).

That's crazy, isn't it?
Never seen such an instruction on another architecture that just is testing
the least significant bit. Maybe that's useful for some shift operations,
but I think there are better commands for this.

>  (There's also a similar addressing mode that uses
> an 8-bit offset, but 1001 can't fit in 8 bits.)
> > (in sum I wonder about alignment und such things..)
> The VAX is extremely forgiving of alignment "errors"; in general, any
> datatype can be accessed at any address.  (Some implementations impose
> a substantial speed penalty for misaligned data, but that's a
> performance issue, not a correctness issue.)  It is, however,
> byte-addressed; it can access things on arbitrary bit boundaries, but
> you have to use the bitfield instructions (insv, extv, etc), which take
> a memory (byte) address and then a bit offset relative to that.
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Thank you Mouse!

>>> d r2 42

>>> d r11 ffda00

>>> start 20044f1e
    PC = 00000001

So the mystery of that "enable bit" is cleared now.

Kind Regards,


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