Re: mostly working SMP again

[David Laight <david%l8s.co.uk@localhost>]

On Tue, Jan 05, 2010 at 10:19:16AM +1100, matthew green wrote:
> 
> so this occurs only on polled console output (maybe input, but
> those are very rare...)
> 
> the sparc zscnputc() routine does the following:
> 
>       a - splhigh()
>       b - redirect all interrupts to me
>       c - waits for transmitter to be ready
>       d - write character
>       e - redirect all interrupts to original source
>       f - splx()
> 
> and my current assumption is that if cpu1 is running this code,
> we end up with a spurious interrupt on cpu0.  my guess is that
> sometime after (e) above, the transmitter clears and then an
> interrupt is generated for this, now sent to cpu0.

More likely the following:
- after (b) the hardware IRQ line is asserted.
- (e) queue a write that will cause the IRQ line to be deasserted
- (f) enables the ISR
(we now take the interrupt)
- the write from (e) reaches the io chip and the IRQ is removed.

You need a membar and a pci flush (eg a readback) between (e) and (f).

        David

-- 
David Laight: david%l8s.co.uk@localhost