> When a process resumes
> execution, PSL_PM will be checked in the saved SSR1 in the
> trapframe. If set, the above registers will be restored
> except for the PMC registers which will be zeroed.
^^^^^^^^^^^^^^^^^^^^^
Okay, that comes as a bit of a surprise. You mean to say that the PMC registers will not be restored for the process across context switches? Does this mean that meaningful counting will only span the duration of a timeslice? If it gets zero-ed out transparent to the application, how does the user process extract meaningful information from the counters?
> But what about the kernel? I assume that doing performance
> of user processes and the kernel concurrently will be desired.
> If so, then on user traps and execptions, the user PM context
> will need to be saved in the trapframe and then the kernel's
> loaded from cpu_info (so it's per-cpu).
How can this be controlled, i.e., who sets up the kernel's PM context and how?
> Though the current PMC framework doesn't allow for it, it
> might be useful for multiple processes/threads to be able to
> share one PMC context.
That makes sense to me. Going for a PMC context per thread looks more like an overkill at this point.
Dheeraj