Re: CURLWP global register in NetBSD/mips

[Paul Koning <paul_koning%dell.com@localhost>]

I think that gcc (all else being equal) will allocate registers from lowest 
numbered to highest.  Saved registers are different from non-saved registers, I 
think, but I would expect all non-saved registers to be treated the same.  So 
that would account for the a registers to be used as scratch a lot.

I'm not sure if this matters other than as a curiosity.  If yes, it can be 
adjusted easily enough by changes to the back-end code in gcc.

        paul

On Dec 24, 2010, at 1:43 AM, Toru Nishimura wrote:

> Matt Thomas said;
> 
>> Here's a breakdown of a MALTA64 kernel of how often each register is used.  
>> I moved MIPS_CURLWP from s7 to t8 (23 to 24).  It's curious as to why one of 
>> t1/t2 is never used.
> 
> It's the output of n32/n64 ABI which extends arg-on-register from 4 to to 8.
> The result shows a4-a7 are frequently used indeed.  It might imply
> functions prefer a0-a7 as temporary scratch registers than choosing t0-t3
> for the same purpose.
> 
> It'd be interesting to make o32 profiling since a3-a7 are used to be
> t0-t3 in o32 ABI.
> 
> Toru Nishimura / ALKYL Technology