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Re: MacPPC serial ports in 4.0.1 - not quite
MI z8530 driver might have some problem because zs serial on cobalt
also gets the similar hangup on heavy both TX and RX load
with high baud rate (115200bps).
> It looks to me like the arch independent code disables ints on the
> serial when the buffer fills, and the arch dependent code re-enables
> them. The token/bit in question is ZSWR1_TIE and ZSWR1_RIE (and friends).
> I see where this happens 4 xmit in dev/ic/z8530tty.c, about line 1646.
> The re-enabling of these interrupts, though I can't find. Maybe
> it was forgotten?
RIE seems disabled when RX buffer is overflowed in zstty_rxint(),
and re-enabled when buffer is okay in zstty_rxsoft(),
which will be invoked via softint(9) scheduled in MD zshard().
TIE is enabled when any data is put into TX buffer in zsstart(),
and disabled when all queued data has been sent in zstty_txint()
invoked via softint(9) as well as RX.
I wonder if we should set ZSWR0_RESET_TXINT after TX
in zstty_txint() rather than clearing ZSWR1_TIE,
but I haven't tried it.
(maybe it could have some other race condition)
We might have to check Z85C30 manual anyway:
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