Port-i386 archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

Re: cpuflags (optimal compiler flags for building)

> On Mon, 8 Dec 2008, Geert Hendrickx wrote:
>> I got "-mfpmath=sse -msse3 -march=prescott" for my Core2 Quatro
>> (with NetBSD/amd64 5.0_STABLE / gcc 4.1.3). Isn't "-march=nocona"
>> a better fallback?

2008/12/8 David Brownlee <abs%netbsd.org@localhost>:
>        *blink*
>        With what version of cpuflags was this? I can't find any version
>        which would fallback to -march=prescott. Could you include the
>        output of cpuflags -v from v1.19 or later?
>        Thanks

I see the same on a Core 2 Duo (I don't know what the correct output
would be).  Here is the output from cpuflags -v (version 1.22):

. /usr/pkg/share/cpuflags/subr_NetBSD
. /usr/pkg/share/cpuflags/subr_gcc
. /usr/pkg/share/cpuflags/subr_x86
ARCH            : -march=prescott
FEATURES        : -mfpmath=sse -msse3
CPUFLAGS        : -mfpmath=sse -msse3 -march=prescott
GCC version     : 4.1.3
OS              : 'NetBSD'
OS version      : '5.99.3'
hw.model        : 'Intel 686-class'
hw.machine      : 'amd64'
hw.machine_arch : 'x86_64'
CPU             : 'Intel Pentium III (Katmai) (686-class), 2527.15
MHz, id 0x10676'
cpu0: Intel Pentium III (Katmai) (686-class), 2527.15 MHz, id 0x10676
cpu0: features bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features bfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX>
cpu0: features bfebfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu0: features2
cpu0: features3 20100800<SYSCALL/SYSRET,XD,EM64T>
cpu0: "Intel(R) Core(TM)2 Duo CPU     T9400  @ 2.53GHz"
cpu0: I-cache 32KB 64B/line 8-way, D-cache 32KB 64B/line 8-way
cpu0: L2 cache 6MB 64B/line 24-way
cpu0: ITLB 128 4KB entries 4-way
cpu0: DTLB 256 4KB entries 4-way, 32 4MB entries 4-way
cpu0: Initial APIC ID 1
cpu0: Cluster/Package ID 0
cpu0: Core ID 1
cpu0: family 06 model 07 extfamily 00 extmodel 01


Pouya D. Tafti

Home | Main Index | Thread Index | Old Index