Ericsson MC-16 hpcboot,linux and a big problem

[Philipp Rosenkranz <ph_rosenkranz%yahoo.de@localhost>]

Hi

I try to boot Linux on the Ericsson MC-16(alias HP 360LX)
(Windows CE 2.0,HD6417707R (SH3), 60MHz Display: 640x240, 16 grayscales
10MB ROM 8MB RAM)
with the hpcboot bootloader.But it doesn't work.
The kernel is compiled for sh3 7707
(BareCPU and without linuxsh bios support).

here is what the boot log (captured over serial port) shows:
>log start<
CPU: SH7709
MemoryManager: SH3 MMU
FileManager: FAT
Memory Bank:
[0] 0x0c000000 size 0x02000000
[1] 0x0e000000 size 0x02000000
GetVersionEx
Windows CE 2.0
GetSystemInfo:
wProcessorArchitecture      0x4
dwPageSize                  0x400
dwAllocationGranularity     0x00010000
dwProcessorType             0x2713
wProcessorLevel             0x3
wProcessorRevision          0x0
Display: 640x240 4bpp
DEBUG BIT: ................................ [0x00000000] 0
open file "\v.gz"(383627 byte).
Loader: ELF
file size: +0x99640 = 0x99800 byte
address translation table 640 pages.(5120 byte)
allocated 640 page. mapped 640 page.
2nd bootloader address U0: 0x001dfc00 P1: 0x8c59a000
[0] vaddr 0x88000000 file size 0x99640 mem size 0xb8a14
    ->load 0x88000000+0x000b8a14=0x880b8a14 ofs=0x00000000+0x99640
[zero clear] ->0x88099640+0x0001f3d4=0x880b8a14
load link 624 zero clear link 1.
kernel entry address: 0x88002000
framebuffer: 640x240 type=8 linebytes=0 addr=0x00000000
console = 2
boot arg: 0x8c59a400 stack: 0x8c59aa00
Booting kernel...
>log end<
CRASH(it makes just a soft reset)

i think it crashed somewhere between this:

>snip<
void
SHArchitecture::jump(paddr_t info, paddr_t pvec)
{
    kaddr_t sp;
    vaddr_t v;
    paddr_t p;

    // stack for bootloader
    _mem->getPage(v, p);
    sp = ptokv(p + _mem->getPageSize() / 2);

    info = ptokv(info);
    pvec = ptokv(pvec);

    DPRINTF((TEXT("boot arg: 0x%08x stack: 0x%08x\nBooting kernel...\n"),
        info, sp));

    // Change to privilege-mode.
    SetKMode(1);

    // Cache flush(for 2nd bootloader)
    //
    // SH4 uses WinCE CacheSync(). this routine may causes TLB
    // exception. so calls before suspendIntr().
    //
    cache_flush();

    // Disable external interrupt.
    suspendIntr();

    // jump to 2nd loader.(run P1) at this time I still use MMU.
    __asm(
        "mov    r6, r15\n"
        "jmp    @r7\n"
        "nop    \n", info, pvec, sp, _loader_addr);
    // NOTREACHED
}
>snap<
and head.S .
since i can't use early printk's i don't know excactly where...
(i don't even know if head.S is reached)
has somebody a hint?
(or Maybe a idea how this could be debuged)


regards

Philipp Rosenkranz