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Re: BeagleBone Black and GPIO issues
After wasting a lot of time on other things I got some pinctrl manual
page text written. It's not good enough to commit, but it is good
enough to post so that we can all see how the pin control works (or
doesn't work).
The fdtbus framework provides a pin controller driver for the BBB.
There are two problems with us using this framework for GPIO, this
first is difficult and the second is insurmountable.
The first problem is that pin changes (such as pullups) need to be
passed up the protocol stack to the ftdbus framework and them come back
down the stack to the pin controller. This is slightly inefficient and
might not play well with systems that I timing sensitive.
The second problem is that the data being passed up and down the
"protocol stack" is raw DTB data. There is little chance we are going
to be generating that data format in the kernel.
I'll talk to tech-kern to see about enhancing the pintctrl API in the
fdtbus framework so that pin controllers can provide and GPIO devices
can access efficient pin controller functionality.
Ngā mihi,
Lloyd
------8<--------------------------
PINCTRL(9) NetBSD Kernel
Developer’s Manual PINCTRL(9)
NAME
fdtbus_register_pinctrl_config, fdtbus_pinctrl_set_config_index,
fdtbus_pinctrl_set_config, fdtbus_pinctrl_has_config — one line descrip‐
tion of name
SYNOPSIS
#include <dev/fdt/fdtvar.h>
int
fdtbus_register_pinctrl_config(device_t dev, int phandle,
const struct fdtbus_pinctrl_controller_func *funcs);
int
fdtbus_pinctrl_set_config_index(int phandle, u_int index);
int
fdtbus_pinctrl_set_config(int phandle, const char *cfgname);
bool
fdtbus_pinctrl_has_config(int phandle, const char *cfgname);
DESCRIPTION
fdtbus_register_pinctrl_config() registers a pin controller configuration
with the ftdbus framework so that other devices on the ftdbus can request
that configuration to be activated. dev is the pin controller device
itself. phandle is a reference to the pin controller configuration being
registered.
The fdtbus_pinctrl_controller_func structure:
struct fdtbus_pinctrl_controller_func {
int (*set_config)(device_t, const void *, size_t);
};
fdtbus_pinctrl_set_config_index() and fdtbus_pinctrl_set_config() ask the
ftdbus framework to enable the named or numbered pin configuration. The
phandle is a reference to the devicetree node of the device driver
requesting the configuration. The cfgname or index parameters indicate
which of a device’s configurations should be used. A device such as an
HDMI port might have pin configurations called "default" and "off".
EXAMPLES
gpio@7e200000 {
compatible = "brcm,bcm2835‐gpio";
gpio‐controller;
uart0_gpio14: uart0_gpio14 {
brcm,pins = <14 15>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
};
serial@7e201000 {
compatible = "arm,pl011", "arm,primecell";
pinctrl‐names = "default";
pinctrl‐0 = <&uart0_gpio14>;
};
pinmux@800 {
compatible = "pinctrl‐single";
uart0_pins: pinmux_uart0_pins {
pinctrl‐single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RXD,
PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD,
PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
};
serial@0 {
compatible = "ti,am3352‐uart", "ti,omap3‐uart";
pinctrl‐names = "default";
pinctrl‐0 = <&uart0_pins>;
};
In the above two examples the brcm,bcm2835‐gpio and pinctrl‐single
devices are both pin controllers and will call
fdtbus_register_pinctrl_config() with &uart0_gpio14 and
&uart0_pins as
phandle.
When the arm,pl011 and ti,am3352‐uart device drivers attach, the
ftdbus
framework will call fdtbus_pinctrl_set_config(default) on behalf
of the
device drivers to ensure that the devices are connected to the
correct
pins on the SoC.
NetBSD 10.99 October 16,
2024 NetBSD 10.99
------8<--------------------------
.Dd October 16, 2024
.Dt PINCTRL 9
.Os
.Sh NAME
.Nm fdtbus_register_pinctrl_config ,
.Nm fdtbus_pinctrl_set_config_index ,
.Nm fdtbus_pinctrl_set_config ,
.Nm fdtbus_pinctrl_has_config
.Nd one line description of name
.Sh SYNOPSIS
.In dev/fdt/fdtvar.h
.Ft int
.Fn fdtbus_register_pinctrl_config "device_t dev" "int phandle" "const
struct fdtbus_pinctrl_controller_func *funcs"
.Ft int
.Fn fdtbus_pinctrl_set_config_index "int phandle" "u_int index"
.Ft int
.Fn fdtbus_pinctrl_set_config "int phandle" "const char *cfgname"
.Ft bool
.Fn fdtbus_pinctrl_has_config "int phandle" "const char *cfgname"
.Sh DESCRIPTION
.Fn fdtbus_register_pinctrl_config
registers a pin controller configuration with the ftdbus framework so
that other devices on the ftdbus can request that configuration to be
activated.
.Fa dev
is the pin controller device itself.
.Fa phandle
is a reference to the pin controller configuration being
registered.
The
.Vt fdtbus_pinctrl_controller_func
structure:
.Bd -literal
struct fdtbus_pinctrl_controller_func {
int (*set_config)(device_t, const void *, size_t);
};
.Ed
.\" without this Pp there is no blank line after the struct which is
ugly
.Pp
.Fn fdtbus_pinctrl_set_config_index
and
.Fn fdtbus_pinctrl_set_config
ask the ftdbus framework to enable the named or numbered pin
configuration. The
.Fa phandle
is a reference to the devicetree node of
the device driver requesting the configuration. The
.Fa cfgname
or
.Fa index
parameters indicate which of a device's configurations should be
used. A device such as an HDMI port might have pin configurations
called "default" and "off".
.\" The following commands should be uncommented and
.\" used where appropriate.
.\" .Sh IMPLEMENTATION NOTES
.\" This next command is for sections 2, 3 and 9 function
.\" return values only.
.\" .Sh RETURN VALUES
.\" .Sh FILES
.Sh EXAMPLES
.Bd -literal
gpio@7e200000 {
compatible = "brcm,bcm2835-gpio";
gpio-controller;
uart0_gpio14: uart0_gpio14 {
brcm,pins = <14 15>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
};
serial@7e201000 {
compatible = "arm,pl011", "arm,primecell";
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
};
.Ed
.Bd -literal
pinmux@800 {
compatible = "pinctrl-single";
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RXD,
PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD,
PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
};
serial@0 {
compatible = "ti,am3352-uart", "ti,omap3-uart";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};
.Ed
In the above two examples the brcm,bcm2835-gpio and pinctrl-single
devices are both pin controllers and will call
.Fn fdtbus_register_pinctrl_config
with &uart0_gpio14 and &uart0_pins as
.Fa phandle .
When the arm,pl011 and ti,am3352-uart device drivers attach, the
ftdbus framework will call
.Fn fdtbus_pinctrl_set_config "default"
on behalf of the device drivers to ensure that the devices are
connected to the correct pins on the SoC.
.\" This next command is for sections 1, 6, 7, 8 and 9 only
.\" (command return values (to shell) and
.\" fprintf/stderr type diagnostics).
.\" .Sh DIAGNOSTICS
.\" .Sh COMPATIBILITY
.\" This next command is for sections 2, 3 and 9 error
.\" and signal handling only.
.\" .Sh ERRORS
.\" .Sh SEE ALSO
.\" .Sh STANDARDS
.\" .Sh HISTORY
.\" .Sh AUTHORS
.\" .Sh BUGS
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